XRT74L73 Datasheet, PDF (237/488 Pages) Exar Corporation – 3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER

PRELIMINARY
XRT74L73
3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER
REV. P1.0.1
II/O CONTROL REGISTER (ADDRESS = 0X01)
BIT 7
Disable
TxLOC
BIT 6
LOC
BIT 5
Disable
RxLOC
BIT 4
AMI/ZeroSup*
BIT 3
Unipolar/
Bipolar*
BIT2
BIT 1
TxLine CLK RxLine CLK
Invert
Invert
BIT 0
Reframe
R/W
RO
R/W
R/W
R/W
R/W
R/W
R/W
1
0
1
0
0
0
0
0
Table 52 depicts the relationship between the value
of this bit-field to the sampling clock edge of RxLi-
neClk.
TABLE 52: THE RELATIONSHIP BETWEEN THE CONTENTS OF BIT 1 (RXLINECLK INV) OF THE I/O CONTROL
REGISTER, AND THE SAMPLING EDGE OF THE RXLINECLK SIGNAL
RXCLKINV
(BIT 1)
RESULT
0
Rising Edge:
RxPOS and RxNEG are sampled at the rising edge of RxLineClk. See Figure 85 for timing relationship
between RxLineClk, RxPOS, and RxNEG.
1
Falling Edge:
RxPOS and RxNEG are sampled at the falling edge of RxLineClk. See Figure 86 for timing relationship
between RxLineClk, RxPOS, and RxNEG.
Figure 85 and Figure 86 present the Waveform and
Timing Relationships between RxLineClk, RxPOS
and RxNEG for each of these configurations.
FIGURE 85. WAVEFORM/TIMING RELATIONSHIP BETWEEN RXLINECLK, RXPOS AND RXNEG - WHEN RXPOS AND
RXNEG ARE TO BE SAMPLED ON THE RISING EDGE OF RXLINECLK
t42
RxLineClk
t38
t39
RxPOS
RxNEG
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