XRT74L73 Datasheet, PDF (324/488 Pages) Exar Corporation – 3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER

XRT74L73
3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER
REV. P1.0.1
PRELIMINARY
TABLE 70: THE RELATIONSHIP BETWEEN THE CONTENTS OF BIT 2 (TX AIS ENABLE) WITHIN THE TX E3
CONFIGURATION REGISTER, AND THE RESULTING TRANSMIT E3 FRAMER BLOCK’S ACTION
BIT 2
0
1
TRANSMIT E3 FRAMER’S ACTION
Normal Operation:
The Transmit Section of the XRT74L73 Framer IC will transmit E3 traffic based upon data that it accepts via
the Transmit Payload Data Input Interface block, the Transmit Overhead Data Input Interface block, the Trans-
mit HDLC Controller block and internally generated overhead bytes.
Transmit AIS Pattern:
The Transmit E3 Framer block will overwrite the E3 traffic, within an Unframed “All Ones” pattern.
NOTE: This bit is ignored whenever the TxLOS bit-field is
set.
5.2.4.2.1.2 Transmit LOS Enable - Bit 1
This read/write bit field allows the user to transmit an
LOS (Loss of Signal) pattern to the remote terminal,
upon software control. Table 71 relates the contents
of this bit field to the Transmit E3 Framer block’s ac-
tion.
TABLE 71: THE RELATIONSHIP BETWEEN THE CONTENTS OF BIT 1 (TX LOS) WITHIN THE TX E3 CONFIGURATION
REGISTER, AND THE RESULTING TRANSMIT E3 FRAMER BLOCK’S ACTION
BIT 1
0
1
TRANSMIT E3 FRAMER’S ACTION
Normal Operation:
The Overhead bits are either internally generated, or they are inserted via the Transmit Overhead Data Input
Interface or the Transmit HDLC Controller blocks. The Payload bits are received from the Transmit Payload
Data Input Interface.
Transmit LOS Pattern:
When this command is invoked the Transmit E3 Framer will do the following.
• Set all of the overhead bytes to "0" (including the FA1 and FA2 bytes)
Overwrite the E3 payload bits with an "all zeros" pattern.
NOTE: When this bit is set, it overrides all of the other bits in
this register.
5.2.4.2.1.3 Transmitting FERF (Far-End
Receive Failure) Indicator or Yellow Alarm
The XRT74L73 Framer IC permits the user to control
the state of the “A” bit-field, within each outbound E3
frame. This can be achieved by writing the appropri-
ate data into the TxASource[1:0] bit-fields within the
Tx E3 Configuration Register, as illustrated below.
TXE3 CONFIGURATION REGISTER (ADDRESS = 0X30)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
Tx
BIP-4
Enable
TxASourceSel[1:0]
TxNSourceSel[1:0]
R/W
R/W
R/W
R/W
R/W
0
X
X
0
0
The following table presents the relationship between
the contents of TxASource[1:0] and the resulting
source of the “A” bit.
BIT 2
Tx AIS
Enable
R/W
0
BIT 1
Tx LOS
Enable
R/W
0
BIT 0
Tx FAS
Source
Select
R/W
0
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