XRT74L73 Datasheet, PDF (28/488 Pages) Exar Corporation – 3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER

XRT74L73
3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER
REV. P1.0.1
PRELIMINARY
PIN DESCRIPTION
PIN#
NAME
Rx PLCP Processor
U25 RxPFrame_0/
RxOHInd_0
U26 RxPFrame_1/
RxOHInd_1
T24
RxPFrame_2/
RxOHInd_2
L24
RxPLOF_0
L25
RxPLOF_1
L26
RxPLOF_2
T26 RxPOHFrame_0
T23 RxPOHFrame_1
R24 RxPOHFrame_2
V25
RxPOOF_0
V26
RxPOOF_1
V23
RxPOOF_2
TYPE
DESCRIPTION
O
Receive PLCP Frame Indicator/Receive Overhead Indicator Output:
The exact function of this output pin depends upon whether the channel has
been configured to operate in the ATM/PLCP, the Clear-Channel Framer/Serial
or the Clear-Channel Framer/Nibble-Parallel Modes.
ATM/PLCP Mode - RxPFrame_n:
This output pin pulses "high" when the Receive PLCP Processor is receiving the
last bit of a PLCP frame.
NOTE: This output pin is inactive if the XRT74L73 is configured to operate in the
Direct-Mapped ATM Mode.
Clear-Channel Framer/Serial Mode - RxOHInd_n:
This output pin pulse "high" (for one bit-period) whenever an "overhead" bit is
being output via the "RxSer_n" output pin, by the Receive Payload Data Output
Interface block.
NOTE: If the user configures the channel to operate in the "Gapped-Clock"
Mode, then this output pin will provide a demand clock to the local terminal
equipment. In the "Gapped-Clock" Mode, this output pin will only provide a clock
pulse, whenever a payload bit is being output via the "RxSer_n" output pin. This
output pin will NOT generate a clock pulse, whenever an overhead is being out-
put via the "RxSer_n" output pin.
Clear-Channel Framer/Nibble-Parallel - RxOHInd_n:
This output pin pulse "high" (for one nibble-period) whenever an overhead nibble
is being output via the "RxNib_n[2:0] output pins, by the Receive Payload Data
Output Interface block.
NOTE: The purpose of this output pin is to alert the local terminal equipment that
an overhead bit (or nibble) is being output via the "RxSer_n" or "RxNib_n[2:0]"
output pins and that this data should be ignored.
O Receive PLCP - "Loss of Frame" Output Indicator:
The Receive PLCP Processor will assert this pin, when it declares a "Loss of
Frame" condition. This output will be negated when the Receive PLCP Proces-
sor reaches the "In Frame" Condition.
NOTE: This output pin is only active is the XRT74L73 device has been config-
ured to operate in the ATM/PLCP Mode.
O Receive PLCP Frame POH Serial Output Port - Frame Indicator:
This output pin, along with the "RxPOH_n" "RxPOHClk_n" and "RxPOHIns_n"
pins comprise the "Receive PLCP Frame POH Byte" serial output port. This out-
put pin provides framing information to external circuitry receiving and process-
ing this POH (Path Overhead) data, by pulsing "high" whenever the first bit of the
Z6 byte is being output via the "RxPOH_n" output pin. This pin is "low" at all
other times during this PLCP POH Framing cycle.
NOTE: This output pin is only active if the XRT74L73 device has been config-
ured to operate in the ATM/PLCP Modes.
O Receive PLCP "Out of Frame" Indicator:
The Receive PLCP Processor will assert this pin, when it declares an "Out of
Frame" condition. This output will be negated when the Receive PLCP Proces-
sor reaches the "In Frame" Condition.
NOTE: This output pin is only valid if the XRT74L73 device has been configured
to operate in the ATM/PLCP Mode.
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