XRT74L73 Datasheet, PDF (277/488 Pages) Exar Corporation – 3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER

PRELIMINARY
XRT74L73
3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER
REV. P1.0.1
if OOF is FALSE
1. It should cease transmitting a FERF (Far-End
Receive Failure) indicator to the Remote Terminal
Equipment. The XRT74L73 Framer IC automati-
cally supports this action via the FERF-upon-
OOF feature.
2. It should transmit the appropriate FEAC Message
(per Bellcore GR-499-CORE), to the Remote Ter-
minal Equipment, indicating that the Service
Affecting condition has been cleared.
4.3.6.2.3 The Change of State of Receive AIS
Interrupt
If the Change of State on Receive AIS (Alarm Indica-
tion Signal) Interrupt is enabled, then the XRT74L73
Framer IC will generate an interrupt in response to ei-
ther of the following conditions.
1. When the XRT74L73 Framer IC detects an AIS
pattern, in the incoming DS3 data stream, and
2. When the XRT74L73 Framer IC no longer
detects the AIS pattern in the incoming DS3 data
stream.
Conditions causing the XRT74L73 Framer IC to
declare an AIS condition
• If the Receive DS3 Framer block (within the
XRT74L73 Framer IC) detects at least 63 DS3
frames, which contains the AIS pattern.
Conditions causing the XRT74L73 Framer IC to
clear the AIS condition.
• Whenever, the Receive DS3 Framer block detects
63 DS3 frames, which do not contain the AIS pat-
tern.
Enabling and Disabling the Change of State on
Receive AIS Interrupt:
The Change of State on Receive AIS Interrupt can be
enabled or disabled by writing the appropriate value
into Bit 5 (AIS Interrupt Enable) within the RxDS3 In-
terrupt Enable Register, as illustrated below.
RXDS3 INTERRUPT ENABLE REGISTER (ADDRESS = 0X12)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
CP Bit Error
Interrupt
Enable
LOS
Interrupt
Enable
AIS
Interrupt
Enable
Idle Interrupt
Enable
FERF
Interrupt
Enable
AIC
Interrupt
Enable
OOF
Interrupt
Enable
P-Bit Error
Interrupt
Enable
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
Setting this bit-field to “1” enables this interrupt. Con-
versely, setting this bit-field to “0” disables this inter-
rupt.
Servicing the Change of State on Receive AIS In-
terrupt
Whenever the XRT74L73 Framer IC detects this in-
terrupt, it will do all of the following.
• It will assert the Interrupt Request output pin (INT)
by driving it "Low".
• It will set Bit 5 (AIS Interrupt Status) within the
RxDS3 Interrupt Status Register, to “1”, as indi-
cated below.
RXDS3 INTERRUPT STATUS REGISTER (ADDRESS = 0X13)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
CP-Bit Error
Interrupt
Status
LOS
Interrupt
Status
AIS
Interrupt
Status
Idle Interrupt
Status
FERF
Interrupt
Status
AIC
Interrupt
Status
OOF
Interrupt
Status
P-Bit Error
Interrupt
Status
RUR
RUR
RUR
RUR
RUR
RUR
RUR
RUR
0
0
1
0
0
0
0
0
Whenever the Terminal Equipment encounters a
Change in AIS on Receive interrupt, it should do the
following.
1. It should determine the current state of the AIS
condition. Recall, that this interrupt can gener-
ated, whenever the XRT74L73 Framer declares
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