XRT74L73 Datasheet, PDF (134/488 Pages) Exar Corporation – 3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER

XRT74L73
3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER
REV. P1.0.1
PRELIMINARY
when the MSB of the Z6 byte is output via the RxPOH
output pin.
TABLE 22: BYTE FORMAT OF PLCP FRAME–POH BYTES HIGHLIGHTED.
PLCP FRAME
2 BYTES
A1
A2
A1
A2
A1
A2
A1
A2
A1
A2
A1
A2
A1
A2
A1
A2
A1
A2
A1
A2
A1
A2
A1
A2
POI
1 BYTE
P11
P10
P9
P8
P7
P6
P5
P4
P3
P2
P1
P0
POH
1 BYTE
Z6
Z5
Z4
Z3
Z2
Z1
X
B1
G1
X
X
C1
PLCP PAYLOAD
53 BYTES
First ATM Cell
ATM Cell
ATM Cell
ATM Cell
ATM Cell
ATM Cell
ATM Cell
ATM Cell
ATM Cell
ATM Cell
ATM Cell
Twelfth ATM Cell
13–14 Nibbles
Trailer
Figure 26 presents a drawing of waveforms illustrat-
ing the timing relationship between RxPOH, RxPO-
HFrame, and RxPOHClk.
FIGURE 26. TIMING RELATIONSHIP BETWEEN THE RECEIVE PLCP POH BYTE SERIAL OUTPUT PORT PINS—RXPOH,
RXPOHFRAME AND RXPOHCLK.
RxPOHClk
t43
t44
RxPOHFrame
t45
t46
RxPOH
3.2.2.4Direct-Mapped ATM Mode
The Receive PLCP Processor will be disabled if the
XRT74L73 DS3/E3 UNI is configured to operate in
the “Direct Mapped ATM” Mode.
3.2.2.5Receive PLCP Processor-related Interrupts
The Receive PLCP Processor will generate interrupts
upon the following conditions:
• Change in OOF status
• Change in LOF status
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