XRT74L73 Datasheet, PDF (4/488 Pages) Exar Corporation – 3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER

XRT74L73
3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER
REV. P1.0.1
PRELIMINARY
5.3.2 THE RECEIVE E3 FRAMER BLOCK ....................................................................................................................... 341
5.3.3 THE RECEIVE HDLC CONTROLLER BLOCK ........................................................................................................ 355
5.3.4 THE RECEIVE OVERHEAD DATA OUTPUT INTERFACE ..................................................................................... 360
5.3.5 THE RECEIVE PAYLOAD DATA OUTPUT INTERFACE ........................................................................................ 366
5.3.6 RECEIVE SECTION INTERRUPT PROCESSING.................................................................................................... 371
6.0 E3/ITU-T G.832 OPERATION OF THE XRT74L73 ............................................................................382
6.1 DESCRIPTION OF THE E3, ITU-T G.832 FRAMES AND ASSOCIATED OVERHEAD BYTES ................. 382
6.1.1 DEFINITION OF THE OVERHEAD BYTES .............................................................................................................. 382
6.2 THE TRANSMIT SECTION OF THE XRT74L73 (E3 MODE OPERATION) ................................................ 385
6.2.1 THE TRANSMIT PAYLOAD DATA INPUT INTERFACE BLOCK ........................................................................... 386
6.2.2 THE TRANSMIT OVERHEAD DATA INPUT INTERFACE ...................................................................................... 400
6.2.3 THE TRANSMIT E3 HDLC CONTROLLER .............................................................................................................. 413
6.2.4 THE TRANSMIT E3 FRAMER BLOCK..................................................................................................................... 421
6.2.5 THE TRANSMIT E3 LINE INTERFACE BLOCK ...................................................................................................... 424
6.2.6 TRANSMIT SECTION INTERRUPT PROCESSING ................................................................................................. 430
6.3 THE RECEIVE SECTION OF THE XRT74L73 (E3 MODE OPERATION) ................................................... 432
6.3.1 THE RECEIVE E3 LIU INTERFACE BLOCK ........................................................................................................... 432
6.3.2 THE RECEIVE E3 FRAMER BLOCK ....................................................................................................................... 438
6.3.3 THE RECEIVE HDLC CONTROLLER BLOCK ........................................................................................................ 453
6.3.4 THE RECEIVE OVERHEAD DATA OUTPUT INTERFACE ..................................................................................... 460
6.3.5 THE RECEIVE PAYLOAD DATA OUTPUT INTERFACE ........................................................................................ 469
6.3.6 RECEIVE SECTION INTERRUPT PROCESSING.................................................................................................... 475
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