XRT74L73 Datasheet, PDF (274/488 Pages) Exar Corporation – 3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER

XRT74L73
3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER
REV. P1.0.1
PRELIMINARY
BLOCK INTERRUPT ENABLE REGISTER (ADDRESS = 0X04)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
RxDS3/E3
Interrupt
Enable
Not Used
R/W
RO
RO
RO
RO
X
0
0
0
0
BIT 2
RO
0
BIT 1
TxDS3/E3
Interrupt
Enable
R/W
0
BIT 0
One Second
Interrupt
Enable
R/W
0
Setting this bit-field to “1” enables the Receive Sec-
tion (at the Block Level) for interrupt generation.
Conversely, setting this bit-field to “0” disables the
Receive Section for interrupt generation.
4.3.6.2 Enabling/Disabling and Servicing
Receive Section Interrupts
The Receive Section of the XRT74L73 Framer IC
contains numerous interrupts. The Enabling/Dis-
abling and Servicing of each of these interrupts is de-
scribed below.
4.3.6.2.1 The Change of State on Receive LOS
Interrupt
If the Change of State on Receive LOS (Loss of Sig-
nal) Interrupt is enabled, then the XRT74L73 Framer
IC will generate an interrupt in response to either of
the following conditions.
1. When the XRT74L73 Framer IC declares an LOS
(Loss of Signal) condition, and
2. When the XRT74L73 Framer IC clears the LOS
(Loss of Signal) condition.
Conditions causing the XRT74L73 Framer IC to
declare an LOS condition
• If the XRT7300 LIU IC declares an LOS condition,
and drives the RLOS input pin (of the XRT74L73
Framer IC) "High".
• If the XRT74L73 Framer IC detects a 180 consecu-
tive “0’s”, via the RxPOS and RxNEG input pins.
Conditions causing the XRT74L73 Framer IC to
clear the LOS condition.
• When the XRT7300 LIU IC ceases declaring an
LOS condition and drives the RLOS input pin (of
the XRT74L73 Framer IC) "Low".
• When the XRT74L73 Framer IC detects at least 60
marks (via the RxPOS and RxNEG input pins) out
of 180 bit-periods.
Enabling and Disabling the Change of State on
Receive LOS Interrupt:
The Change of State on Receive LOS Interrupt can
be enabled or disabled by writing the appropriate val-
ue into Bit 6 (LOS Interrupt Enable) within the RxDS3
Interrupt Enable Register, as illustrated below.
RXDS3 INTERRUPT ENABLE REGISTER (ADDRESS = 0X12)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
CP Bit Error
Interrupt
Enable
LOS
Interrupt
Enable
AIS
Interrupt
Enable
Idle Interrupt
Enable
FERF
Interrupt
Enable
AIC
Interrupt
Enable
OOF
Interrupt
Enable
P-Bit Error
Interrupt
Enable
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
Setting this bit-field to “1” enables this interrupt. Con-
versely, setting this bit-field to “0” disables this inter-
rupt.
Servicing the Change of State on Receive LOS In-
terrupt
Whenever the XRT74L73 Framer IC detects this in-
terrupt, it will do all of the following.
• It will assert the Interrupt Request output pin (INT)
by driving this pin "Low".
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