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XRT74L73 Datasheet, PDF (113/488 Pages) Exar Corporation – 3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER
PRELIMINARY
XRT74L73
3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER
REV. P1.0.1
bytes that contain information on: Path Overhead
Identification, Bit Interleaved Parity Calculation results,
Far-End Block Error status, and stuffing status. The
generation of PLCP frames can either be synchronized
to an external 8 kHz reference clock or to timing from
the Receive PLCP Processor. PLCP frame generation
can also be asynchronous with respect to any timing
signals. The Transmit PLCP Processor can compute
its “nibble-stuffing” requirements based upon its
configured synchronous timing source (e.g., the ex-
ternal 8 kHz reference clock or Receive PLCP
Timing), arbitrarily controlled via an external pin or by
following a fixed stuffing pattern. Once a PLCP frame
is formed, it is routed to the Transmit DS3 Framer
Block of the UNI for transmission to the “Far End” Ter-
minal. Figure 18 presents a simple illustration of the
Transmit PLCP Processor and the associated exter-
nal pins.
Note: The user has the option of taking advantage of the
full DS3 payload bandwidth by by-passing the PLCP
Processor altogether. This option will be referred to as
“Direct Mapping” and is discussed in Section 6.3.3.9
FIGURE 18. SIMPLE ILLUSTRATION OF THE TRANSMIT
PLCP PROCESSOR BLOCK
To Transmit DS3
Framer
TxPFrame
8kRef
StuffCtl
TxPOHFrame
TxPOH
TxPOHIns
TxPOHClk
Transmit PLCP
Processor
From Transmit Cell
Processor
2.3.2Description of the PLCP Frame and the Path
Overhead (POH) Bytes
The Transmit PLCP Processor receives ATM cells
from the Transmit Cell Processor. It then multiplexes
these cells with some overhead (OH) bytes and
frames this composite information into PLCP Frames.
Table 13 presents the byte format of a PLCP Frame.
TABLE 13: FRAME FORMAT OF THE PLCP FRAME
PLCP FRAME 2 BYTES
A1
A2
A1
A2
A1
A2
A1
A2
A1
A2
A1
A2
A1
A2
A1
A2
A1
A2
A1
A2
A1
A2
POI 1 BYTE
P11
P10
P9
P8
P7
P6
P5
P4
P3
P2
P1
POH 1 BYTE
Z6
Z5
Z4
Z3
Z2
Z1
X
B1
G1
X
X
PLCP PAYLOAD 53 BYTES
First ATM Cell
ATM Cell
ATM Cell
ATM Cell
ATM Cell
ATM Cell
ATM Cell
ATM Cell
ATM Cell
ATM Cell
ATM Cell
13–14 NIBBLES
114