XRT74L73 Datasheet, PDF (144/488 Pages) Exar Corporation – 3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER

XRT74L73
3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER
REV. P1.0.1
PRELIMINARY
RxCP Configuration Register (Address = 4Ch)
BIT 7
RxLCD
RO
0
BIT 6
RDPChk
Pattern
R/W
x
BIT 5
RDPChk
Pattern Enable
R/W
x
BIT 4
Idle Cell
Discard
R/W
x
BIT 3
OAM Check
Bit
R/W
x
BIT 2
De-Scramble
Enable
R/W
x
BIT 1
RxCoset
Enable
R/W
x
BIT 0
HEC Error
Ignore
R/W
x
If a “0” is written to this bit-field, then the Idle Cells will
be retained and will ultimately be sent on to the User
Cell Filter within the Receive Cell Processor block.
However, if a “1” is written to this bit-field, then the Re-
ceive Cell Processor will discard all detected Idle-cells.
If the user wishes to have the Receive Cell Processor
discard the Idle Cells, the header byte patterns of
these Idle cells must be specified. The Idle Cell head-
er byte pattern is defined based upon the content of 8
read/write registers. These eight registers are the four
“RxCP Idle Cell Pattern Header byte registers, and the
four “RxCP Idle Cell Mask Header—Byte” Registers.
In short, when a cell reaches the “Idle Cell Filter” por-
tion of the Receive Cell Processor, the contents of
each header byte of this cell (bytes 1 through 4), will
be compared against the contents of the correspond-
ing “RxCP Idle Cell Pattern Header Byte” registers,
based upon constraints specified by the contents
within the “RxCP Idle Cell Mask Header Byte” regis-
ters. The use of these registers in “Idle Cell Identifica-
tion” and filtering is illustrated in the example below.
Example—Idle Cell Filtering
For example, header byte 1 of a given incoming cell
(which may be an Idle cell or a User cell) will be sub-
jected to a bit-by-bit comparison to the contents of the
“RxCP Idle Cell Pattern Header Byte-1” register (Ad-
dress = 50h). The purpose of having the Receive Cell
Processor perform this comparison is to determine if
this incoming cell is an Idle Cell or not. The contents
of the “RxCP Idle Cell Mask Header Byte-1” register
(Address = 54h) also plays a role in this comparison
process. For instance, if bit-field “0” within the “RxCP
Idle Cell Mask Header Byte-1” register contains a “1”,
then the Receive Cell Processor will perform the
comparison operation between bit-field “0” within the
“RxCP Idle Cell Pattern Header Byte-1” register; and
bit-field “0” within header byte 1 of the newly received
cell. Conversely, if bit-field “0” within the “RxCP Idle
Cell Mask Header Byte-1” register contains a “0”,
then this comparison will not be made and bit-field “0”
will be treated as a “don’t care”. The role of these two
read/write registers, in these comparison operations is
more clearly defined in Table 25 , below.
TABLE 25: ILLUSTRATION OF THE ROLE OF THE “RXCP IDLE CELL PATTERN HEADER BYTE” REGISTER, AND THE
“RXCP IDLE CELL MASK HEADER BYTE” REGISTER
Content of Header Byte-1 (of Incoming Cell)
BIT 7
BIT 6
BIT 5
BIT 4
1
0
1
0
BIT 3
0
BIT 2
1
BIT 1
0
BIT 0
1
Content of “RxCP Idle Cell Mask Header Byte-1 Register
BIT 7
BIT 6
BIT 5
BIT 4
1
1
1
1
BIT 3
0
Content of “RxCP Idle Cell Header Byte-1 Register
BIT 7
BIT 6
BIT 5
BIT 4
1
0
1
0
BIT 3
1
BIT 2
0
BIT 2
1
BIT 1
0
BIT 1
0
BIT 0
0
BIT 0
1
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