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DS083 Datasheet, PDF (91/430 Pages) Xilinx, Inc – Summary of Features
R
Virtex-II Pro and Virtex-II Pro X Platform FPGAs: DC and Switching Characteristics
Table 30: RocketIO RXUSRCLK2 Switching Characteristics (Continued)
Description
Clock
RXUSRCLK2 minimum pulse width, High
RXUSRCLK2 minimum pulse width, Low
Symbol
TGPWH_RX2
TGPWL_RX2
Speed Grade
-7
-6
-5
1.42
1.42
2.25
1.42
1.42
2.25
Units
ns, min
ns, min
Table 31: RocketIO TXUSRCLK2 Switching Characteristics
Description
Setup and Hold Relative to Clock
(TXUSRCLK2)
CONFIGENABLE control input
TXBYPASS8B10B control inputs
TXFORCECRCERR control input
TXPOLARITY control input
TXINHIBIT control inputs
LOOPBACK control inputs
TXRESET control input
TXCHARISK control inputs
TXCHARDISPMODE control inputs
TXCHARDISPVAL control inputs
CONFIGIN data input
TXDATA data inputs
Clock to Out
TXBUFERR status output
TXKERR status outputs
TXRUNDISP status outputs
CONFIGOUT data output
Clock
TXUSRCLK2 minimum pulse width, High
TXUSRCLK2 minimum pulse width, Low
Symbol
TGCCK_CFGEN/TGCKC_CFGEN
TGCCK_TBYP/TGCKC_TBYP
TGCCK_TCRCE/TGCKC_TCRCE
TGCCK_TPOL/TGCKC_TPOL
TGCCK_TINH/TGCKC_TINH
TGCCK_LBK/TGCKC_LBK
TGCCK_TRST/TGCKC_TRST
TGCCK_TKCH/TGCKC_TKCH
TGCCK_TCDM/TGCKC_TCDM
TGCCK_TCDV/TGCKC_TCDV
TGDCK_CFGIN/TGCKD_CFGIN
TGDCK_TDAT/TGCKD_TDAT
TGCKST_TBERR
TGCKST_TKERR
TGCKST_TRDIS
TGCKDO_CFGOUT
TGPWH_TX2
TGPWL_TX2
Speed Grade
-7
-6
-5
Units
0.35/ 0.10 0.35/ 0.10 0.39/ 0.11
0.02/ 0.00 0.02/ 0.00 0.02/ 0.00
0.39/ 0.12 0.44/ 0.14 0.49/ 0.15
0.02/ 0.00 0.02/ 0.00 0.02/ 0.00
0.02/ 0.00 0.02/ 0.00 0.02/ 0.00
0.02/ 0.00 0.02/ 0.00 0.02/ 0.00
0.02/ 0.10 0.02/ 0.10 0.02/ 0.11
0.02/ 0.00 0.02/ 0.00 0.02/ 0.00
0.02/ 0.00 0.02/ 0.00 0.02/ 0.00
0.02/ 0.00 0.02/ 0.00 0.02/ 0.00
0.35/ 0.10 0.35/ 0.10 0.39/ 0.11
0.02/ 0.00 0.02/ 0.00 0.02/ 0.00
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
0.54
0.54
0.60 ns, max
0.41
0.41
0.46 ns, max
0.41
0.41
0.46 ns, max
0.25
0.25
0.28 ns, max
1.42
1.42
2.25 ns, min
1.42
1.42
2.25 ns, min
DS083 (v4.7) November 5, 2007
Product Specification
www.xilinx.com
Module 3 of 4
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