DS083 Datasheet, PDF (244/430 Pages) Xilinx, Inc – Summary of Features

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Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Pinout Information
Table 10: FF1152 — XC2VP20, XC2VP30, XC2VP40, and XC2VP50
Bank
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
Pin Description
IO_L18N_7
IO_L17P_7
IO_L17N_7
IO_L16P_7
IO_L16N_7/VREF_7
IO_L15P_7
IO_L15N_7
IO_L06P_7
IO_L06N_7
IO_L05P_7
IO_L05N_7
IO_L04P_7
IO_L04N_7/VREF_7
IO_L03P_7
IO_L03N_7
IO_L02P_7
IO_L02N_7
IO_L01P_7/VRN_7
IO_L01N_7/VRP_7
Pin
Number
L25
F34
F33
G30
G29
G32
G31
F31
F30
J28
J27
E34
E33
E32
E31
F28
F27
D34
D33
XC2VP20
NC
NC
NC
NC
NC
NC
NC
No Connects
XC2VP30 XC2VP40
XC2VP50
0
VCCO_0
C29
0
VCCO_0
E20
0
VCCO_0
F25
0
VCCO_0
L20
0
VCCO_0
L21
0
VCCO_0
L22
0
VCCO_0
L23
0
VCCO_0
M18
0
VCCO_0
M19
0
VCCO_0
M20
0
VCCO_0
M21
0
VCCO_0
M22
1
VCCO_1
C6
1
VCCO_1
E15
1
VCCO_1
F10
1
VCCO_1
L12
1
VCCO_1
L13
1
VCCO_1
L14
DS083 (v4.7) November 5, 2007
Product Specification
www.xilinx.com
Module 4 of 4
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