DS083 Datasheet, PDF (332/430 Pages) Xilinx, Inc – Summary of Features

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Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Pinout Information
FF1704 Flip-Chip Fine-Pitch BGA Package
As shown in Table 13, XC2VP70 and XC2VP100 Virtex-II Pro devices are available in the FF1704 flip-chip fine-pitch BGA
package. Following this table are the FF1704 Flip-Chip Fine-Pitch BGA Package Specifications (1.00mm pitch).
Table 13: FF1704 — XC2VP70, XC2VPX70, and XC2VP100
Pin Description
Bank
Virtex-II Pro Devices
XC2VPX70
(if Different)
0
IO_L01N_0/VRP_0
0
IO_L01P_0/VRN_0
0
IO_L02N_0
0
IO_L02P_0
0
IO_L03N_0
0
IO_L03P_0/VREF_0
0
IO_L05_0/No_Pair
0
IO_L06N_0
0
IO_L06P_0
0
IO_L07N_0
0
IO_L07P_0
0
IO_L08N_0
0
IO_L08P_0
0
IO_L09N_0
0
IO_L09P_0/VREF_0
0
IO_L19N_0
0
IO_L19P_0
0
IO_L20N_0
0
IO_L20P_0
0
IO_L21N_0
0
IO_L21P_0
0
IO_L25N_0
0
IO_L25P_0
0
IO_L26N_0
0
IO_L26P_0
0
IO_L27N_0
0
IO_L27P_0/VREF_0
0
IO_L28N_0
0
IO_L28P_0
0
IO_L29N_0
0
IO_L29P_0
0
IO_L30N_0
0
IO_L30P_0
Pin Number
G34
H34
F34
E34
C34
D34
K32
H33
J33
F33
G33
E33
D33
H32
J32
E32
F32
C33
C32
K31
L31
H31
J31
G31
F31
D31
E31
L30
M30
J30
K30
G30
H30
No Connects
XC2VP70,
XC2VPX70
XC2VP100
DS083 (v4.7) November 5, 2007
Product Specification
www.xilinx.com
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