DS083 Datasheet, PDF (47/430 Pages) Xilinx, Inc – Summary of Features

R
SHIFTIN
SOPIN
G4
G3
G2
G1
WG4
WG3
WG2
WG1
ALTDIG
BY
SLICEWE[2:0]
CE
CLK
SR
Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Functional Description
COUT
ORCY
0
Dual-Port
Shift-Reg
A4
A3 ^LUT
A2
A1
RAM
ROM
WG4
D
WG3 ^G
WG2
WG1
MC15
WS DI
MULTAND
1
MUXCY
01
G2
PROD
G1
1 ^BY
0
CYOG
YBMUX
GYMUX
XORG
FF
LATCH
DYMUX
CE
CLK
D
Q
Y
CE
CK
SR REV
WSG
SHIFTOUT
SR
WE[2:0]
WE
CLK
WSF
MUXCY
0
1
SOPOUT
YB
Y
DY
Q
DIG
Shared between
x & y Registers
CIN
Figure 34: Virtex-II Pro Slice (Top Half)
DS031_01_112502
DS083 (v4.7) November 5, 2007
Product Specification
www.xilinx.com
Module 2 of 4
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