DS083 Datasheet, PDF (141/430 Pages) Xilinx, Inc – Summary of Features

R
Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Pinout Information
Table 5: FG256/FGG256 — XC2VP2 and XC2VP4
Bank
Pin Description
N/A
AVCCAUXRX7
N/A
AVCCAUXRX18
N/A
VTRXPAD18
N/A
RXNPAD18
N/A
RXPPAD18
N/A
GNDA18
N/A
TXPPAD18
N/A
TXNPAD18
N/A
VTTXPAD18
N/A
AVCCAUXTX18
N/A
AVCCAUXRX19
N/A
VTRXPAD19
N/A
RXNPAD19
N/A
RXPPAD19
N/A
GNDA19
N/A
TXPPAD19
N/A
TXNPAD19
N/A
VTTXPAD19
N/A
AVCCAUXTX19
Pin Number
B13
R13
R12
T13
T12
P11
T11
T10
R10
R11
R7
R6
T7
T6
P6
T5
T4
R4
R5
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
DS083 (v4.7) November 5, 2007
Product Specification
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCAUX
VCCAUX
VCCAUX
VCCAUX
GND
GND
GND
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N4
N13
M5
M12
E5
E12
D4
D13
R16
R1
B16
B1
T16
T1
R2
Module 4 of 4
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