DS083 Datasheet, PDF (190/430 Pages) Xilinx, Inc – Summary of Features

R
Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Pinout Information
Table 8: FF672 — XC2VP2, XC2VP4, and XC2VP7
Bank
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
Pin Description
IO_L44P_7
IO_L44N_7
IO_L43P_7
IO_L43N_7
IO_L42P_7
IO_L42N_7
IO_L40P_7
IO_L40N_7/VREF_7
IO_L06P_7
IO_L06N_7
IO_L05P_7
IO_L05N_7
IO_L04P_7
IO_L04N_7/VREF_7
IO_L03P_7
IO_L03N_7
IO_L02P_7
IO_L02N_7
IO_L01P_7/VRN_7
IO_L01N_7/VRP_7
Pin
Number
G24
G23
G22
G21
F25
F24
F23
F22
E26
E25
E24
E23
D26
D25
C26
C25
B26
A25
D24
C23
XC2VP2
NC
NC
NC
NC
NC
NC
NC
NC
No Connects
XC2VP4
NC
NC
NC
NC
XC2VP7
NC
NC
NC
NC
0
VCCO_0
C17
0
VCCO_0
C20
0
VCCO_0
H17
0
VCCO_0
H18
0
VCCO_0
J14
0
VCCO_0
J15
0
VCCO_0
J16
1
VCCO_1
C7
1
VCCO_1
H9
1
VCCO_1
C10
1
VCCO_1
H10
1
VCCO_1
J11
1
VCCO_1
J12
1
VCCO_1
J13
2
VCCO_2
G2
2
VCCO_2
J8
DS083 (v4.7) November 5, 2007
Product Specification
www.xilinx.com
Module 4 of 4
62