DS083 Datasheet, PDF (174/430 Pages) Xilinx, Inc – Summary of Features

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Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Pinout Information
Table 7: FG676/FGG676 — XC2VP20, XC2VP30, and XC2VP40
Bank
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Pin Description
AVCCAUXRX21
VTRXPAD21
RXNPAD21
RXPPAD21
GNDA21
TXPPAD21
TXNPAD21
VTTXPAD21
AVCCAUXTX21
M2
M0
M1
TDI
Pin Number
AE7
AE6
AF7
AF6
AD6
AF5
AF4
AE4
AE5
AD4
AF3
AE3
D3
No Connects
XC2VP20 XC2VP30 XC2VP40
N/A
VCCINT
G10
N/A
VCCINT
G13
N/A
VCCINT
G14
N/A
VCCINT
G17
N/A
VCCINT
J9
N/A
VCCINT
J18
N/A
VCCINT
K7
N/A
VCCINT
K10
N/A
VCCINT
K11
N/A
VCCINT
K16
N/A
VCCINT
K17
N/A
VCCINT
K20
N/A
VCCINT
L10
N/A
VCCINT
L17
N/A
VCCINT
N7
N/A
VCCINT
N20
N/A
VCCINT
P7
N/A
VCCINT
P20
N/A
VCCINT
T10
N/A
VCCINT
T17
N/A
VCCINT
U7
DS083 (v4.7) November 5, 2007
Product Specification
www.xilinx.com
Module 4 of 4
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