DS083 Datasheet, PDF (267/430 Pages) Xilinx, Inc – Summary of Features

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Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Pinout Information
Table 11: FF1148 — XC2VP40 and XC2VP50
Bank
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
Pin Description
IO_L36N_3
IO_L36P_3
IO_L35N_3
IO_L35P_3
IO_L34N_3
IO_L34P_3
IO_L33N_3/VREF_3
IO_L33P_3
IO_L32N_3
IO_L32P_3
IO_L31N_3
IO_L31P_3
IO_L30N_3
IO_L30P_3
IO_L29N_3
IO_L29P_3
IO_L28N_3
IO_L28P_3
IO_L27N_3/VREF_3
IO_L27P_3
IO_L26N_3
IO_L26P_3
IO_L25N_3
IO_L25P_3
IO_L24N_3
IO_L24P_3
IO_L23N_3
IO_L23P_3
IO_L22N_3
IO_L22P_3
IO_L21N_3/VREF_3
IO_L21P_3
IO_L20N_3
IO_L20P_3
IO_L19N_3
IO_L19P_3
IO_L18N_3
IO_L18P_3
Pin Number
AE4
AF4
AC10
AD10
AE1
AE2
AF6
AF7
AC8
AC9
AF2
AF3
AG5
AG6
AD9
AE9
AG4
AH3
AG2
AG3
AD7
AE7
AH6
AH7
AH5
AJ5
AE8
AF8
AH1
AH2
AJ6
AK6
AG7
AG8
AJ3
AJ4
AJ1
AJ2
No Connects
XC2VP40
XC2VP50
DS083 (v4.7) November 5, 2007
Product Specification
www.xilinx.com
Module 4 of 4
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