DS083 Datasheet, PDF (142/430 Pages) Xilinx, Inc – Summary of Features

R
Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Pinout Information
Table 5: FG256/FGG256 — XC2VP2 and XC2VP4
Bank
Pin Description
N/A
GND
N/A
GND
N/A
GND
N/A
GND
N/A
GND
N/A
GND
N/A
GND
N/A
GND
N/A
GND
N/A
GND
N/A
GND
N/A
GND
N/A
GND
N/A
GND
N/A
GND
N/A
GND
N/A
GND
N/A
GND
N/A
GND
N/A
GND
N/A
GND
N/A
GND
N/A
GND
N/A
GND
N/A
GND
Notes:
1. See Table 4 for an explanation of the signals available on this pin.
Pin Number
R15
L6
L11
K9
K8
K7
K10
J9
J8
J7
J10
H9
H8
H7
H10
G9
G8
G7
G10
F6
F11
B2
B15
A16
A1
DS083 (v4.7) November 5, 2007
Product Specification
www.xilinx.com
Module 4 of 4
14