DS083 Datasheet, PDF (111/430 Pages) Xilinx, Inc – Summary of Features

R
Virtex-II Pro and Virtex-II Pro X Platform FPGAs: DC and Switching Characteristics
JTAG Test Access Port Switching Characteristics
Characterization data for some of the most commonly requested timing parameters shown in Figure 11 is listed in Table 49.
FI
TMS
TDI
TCK
TDO
1
2
T_TAPTCK T_TCKTAP
3
T_TCKTDO
Data Valid
Data to be captured
Data to be driven out
Data Valid
Figure 11: Virtex-II Pro Boundary Scan Port Timing Waveforms
ds083-3_11_012104
Table 49: Boundary-Scan Port Timing Specifications
Description
Figure
References
TMS and TDI setup time
1
TMS and TDI hold times
2
TCK
Falling edge to TDO output valid
3
Maximum frequency
Symbol
T_TAPTCK
T_TCKTAP
T_TCKTDO
F_TCK
Value
5.5
2.0
11.0
33.0
Units
ns, min
ns, min
ns, max
MHz, max
DS083 (v4.7) November 5, 2007
Product Specification
www.xilinx.com
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