DS083 Datasheet, PDF (197/430 Pages) Xilinx, Inc – Summary of Features

R
Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Pinout Information
Table 8: FF672 — XC2VP2, XC2VP4, and XC2VP7
Bank
Pin Description
Pin
Number
N/A
GND
R15
N/A
GND
R16
N/A
GND
R17
N/A
GND
T11
N/A
GND
T12
N/A
GND
T13
N/A
GND
T14
N/A
GND
T15
N/A
GND
T16
N/A
GND
U10
N/A
GND
U12
N/A
GND
U13
N/A
GND
U14
N/A
GND
U15
N/A
GND
U17
N/A
GND
Y20
N/A
GND
AA21
N/A
GND
AB22
N/A
GND
AC23
N/A
GND
AD24
Notes:
1. See Table 4 for an explanation of the signals available on this pin.
XC2VP2
No Connects
XC2VP4
XC2VP7
DS083 (v4.7) November 5, 2007
Product Specification
www.xilinx.com
Module 4 of 4
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