DS083 Datasheet, PDF (44/430 Pages) Xilinx, Inc – Summary of Features

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Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Functional Description
Figure 29 provides examples illustrating the use of the SSTL2_I_DCI, SSTL2_II_DCI, SSTL18_I_DCI, and SSTL18_II_DCI
I/O standards. For a complete list, see the Virtex-II Pro Platform FPGA User Guide.
Conventional
SSTL2_I or SSTL18_I
V_CCO/2
R
Z0
R/2
SSTL2_II or SSTL18_II
V_CCO/2
V_CCO/2
R
R
Z0
R/2
DCI Transmit
Conventional
Receive
25Ω⁽¹⁾
Virtex-II Pro
DCI
V_CCO/2
R
Z0
V_CCO
25Ω⁽¹⁾ _2R
2R
Virtex-II Pro
DCI
V_CCO/2
R
Z0
Conventional
Transmit
DCI Receive
V_CCO
2R
Z0
R/2
2R
Virtex-II Pro
DCI
V_CCO/2
R
Z0
R/2
V_CCO
2R
2R
Virtex-II Pro
DCI
DCI Transmit
DCI Receive
25Ω⁽¹⁾
Virtex-II Pro
DCI
V_CCO
2R
Z0
V_CCO
25Ω⁽¹⁾ _2R
V_CCO
2R
Z0
2R
2R
2R
Virtex-II Pro Virtex-II Pro
DCI
DCI
Virtex-II Pro
DCI
Bidirectional
Reference
Resistor
N/A
VRN = VRP = R = Z0
V_CCO
25Ω⁽¹⁾
2R
V_CCO
2R
Z0
2R
2R
Virtex-II Pro
DCI
25Ω
Virtex-II Pro
DCI
VRN = VRP = R = Z0
Recommended
Z0⁽²⁾
50Ω
50Ω
Notes:
DS083-2_65b_011603
1. The SSTL-compatible 25Ω series resistor is accounted for in the DCI buffer,
and it is not DCI controlled.
2. Z0 is the recommended PCB trace impedance.
Figure 29: SSTL DCI Usage Examples
DS083 (v4.7) November 5, 2007
Product Specification
www.xilinx.com
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