DS083 Datasheet, PDF (221/430 Pages) Xilinx, Inc – Summary of Features

R
Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Pinout Information
Table 9: FF896 — XC2VP7, XC2VP20, XC2VPX20, and XC2VP30
Pin Description
Bank
Virtex-II Pro devices
XC2VPX20
(if Different)
Pin
Number
N/A
GND
AG19
N/A
GND
AG12
N/A
GND
AG9
N/A
GND
AG4
N/A
GND
AF26
N/A
GND
AF5
N/A
GND
AE25
N/A
GND
AE18
N/A
GND
AE13
N/A
GND
AE6
N/A
GND
AC30
N/A
GND
AC1
N/A
GND
Y28
N/A
GND
Y25
N/A
GND
Y20
N/A
GND
Y11
N/A
GND
Y6
N/A
GND
Y3
N/A
GND
W19
N/A
GND
W18
N/A
GND
W17
N/A
GND
W16
N/A
GND
W15
N/A
GND
W14
N/A
GND
W13
N/A
GND
W12
N/A
GND
V19
N/A
GND
V18
N/A
GND
V17
N/A
GND
V16
N/A
GND
V15
N/A
GND
V14
N/A
GND
V13
N/A
GND
V12
N/A
GND
U25
N/A
GND
U19
XC2VP7
No Connects
XC2VP20,
XC2VPX20 XC2VP30
DS083 (v4.7) November 5, 2007
Product Specification
www.xilinx.com
Module 4 of 4
93