DS083 Datasheet, PDF (233/430 Pages) Xilinx, Inc – Summary of Features

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Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Pinout Information
Table 10: FF1152 — XC2VP20, XC2VP30, XC2VP40, and XC2VP50
Bank
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
Pin Description
IO_L58P_3
IO_L57N_3/VREF_3
IO_L57P_3
IO_L56N_3
IO_L56P_3
IO_L55N_3
IO_L55P_3
IO_L54N_3
IO_L54P_3
IO_L53N_3
IO_L53P_3
IO_L52N_3
IO_L52P_3
IO_L51N_3/VREF_3
IO_L51P_3
IO_L50N_3
IO_L50P_3
IO_L49N_3
IO_L49P_3
IO_L48N_3
IO_L48P_3
IO_L47N_3
IO_L47P_3
IO_L46N_3
IO_L46P_3
IO_L45N_3/VREF_3
IO_L45P_3
IO_L44N_3
IO_L44P_3
IO_L43N_3
IO_L43P_3
IO_L42N_3
IO_L42P_3
IO_L41N_3
IO_L41P_3
IO_L40N_3
IO_L40P_3
IO_L39N_3/VREF_3
Pin
Number
W6
Y3
Y4
W7
W8
Y6
Y7
AA2
AB2
W9
W10
AA3
AA4
AB1
AC1
Y9
Y10
AA5
AA6
AB3
AB4
AA7
AA8
AB5
AB6
AC2
AD2
AA9
AA10
AC3
AC4
AD1
AE1
AB7
AB8
AC6
AC7
AD3
XC2VP20
No Connects
XC2VP30 XC2VP40
XC2VP50
DS083 (v4.7) November 5, 2007
Product Specification
www.xilinx.com
Module 4 of 4
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