DS083 Datasheet, PDF (156/430 Pages) Xilinx, Inc – Summary of Features

R
Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Pinout Information
Table 6: FG456/FGG456 — XC2VP2, XC2VP4, and XC2VP7
Bank
Pin Description
Pin Number
N/A
GND
L11
N/A
GND
L10
N/A
GND
K9
N/A
GND
K14
N/A
GND
K13
N/A
GND
K12
N/A
GND
K11
N/A
GND
K10
N/A
GND
J9
N/A
GND
J14
N/A
GND
J13
N/A
GND
J12
N/A
GND
J11
N/A
GND
J10
N/A
GND
E5
N/A
GND
E18
N/A
GND
D4
N/A
GND
D19
N/A
GND
C3
N/A
GND
C20
N/A
GND
AB22
N/A
GND
AB12
N/A
GND
AB1
N/A
GND
A22
N/A
GND
A11
N/A
GND
A1
Notes:
1. See Table 4 for an explanation of the signals available on this pin.
No Connects
XC2VP2 XC2VP4 XC2VP7
DS083 (v4.7) November 5, 2007
Product Specification
www.xilinx.com
Module 4 of 4
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