DS083 Datasheet, PDF (343/430 Pages) Xilinx, Inc – Summary of Features

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Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Pinout Information
Table 13: FF1704 — XC2VP70, XC2VPX70, and XC2VP100
Pin Description
Bank
Virtex-II Pro Devices
XC2VPX70
(if Different)
3
IO_L53N_3
3
IO_L53P_3
3
IO_L52N_3
3
IO_L52P_3
3
IO_L51N_3/VREF_3
3
IO_L51P_3
3
IO_L50N_3
3
IO_L50P_3
3
IO_L49N_3
3
IO_L49P_3
3
IO_L48N_3
3
IO_L48P_3
3
IO_L47N_3
3
IO_L47P_3
3
IO_L46N_3
3
IO_L46P_3
3
IO_L45N_3/VREF_3
3
IO_L45P_3
3
IO_L44N_3
3
IO_L44P_3
3
IO_L43N_3
3
IO_L43P_3
3
IO_L42N_3
3
IO_L42P_3
3
IO_L41N_3
3
IO_L41P_3
3
IO_L40N_3
3
IO_L40P_3
3
IO_L39N_3/VREF_3
3
IO_L39P_3
3
IO_L38N_3
3
IO_L38P_3
3
IO_L37N_3
3
IO_L37P_3
3
IO_L36N_3
3
IO_L36P_3
Pin Number
AE10
AE11
AE1
AE2
AE4
AE5
AF11
AE12
AE7
AE8
AF1
AF2
AG12
AF12
AF3
AF4
AF5
AF6
AF7
AF8
AF9
AF10
AG2
AG3
AG10
AG11
AG4
AG5
AG6
AG7
AG8
AH8
AH1
AH2
AH3
AJ3
No Connects
XC2VP70,
XC2VPX70
XC2VP100
DS083 (v4.7) November 5, 2007
Product Specification
www.xilinx.com
Module 4 of 4
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