DS083 Datasheet, PDF (277/430 Pages) Xilinx, Inc – Summary of Features

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Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Pinout Information
Table 11: FF1148 — XC2VP40 and XC2VP50
Bank
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
Pin Description
IO_L51P_7
IO_L51N_7
IO_L50P_7
IO_L50N_7
IO_L49P_7
IO_L49N_7
IO_L48P_7
IO_L48N_7
IO_L47P_7
IO_L47N_7
IO_L46P_7
IO_L46N_7/VREF_7
IO_L45P_7
IO_L45N_7
IO_L44P_7
IO_L44N_7
IO_L43P_7
IO_L43N_7
IO_L42P_7
IO_L42N_7
IO_L41P_7
IO_L41N_7
IO_L40P_7
IO_L40N_7/VREF_7
IO_L39P_7
IO_L39N_7
IO_L38P_7
IO_L38N_7
IO_L37P_7
IO_L37N_7
IO_L36P_7
IO_L36N_7
IO_L35P_7
IO_L35N_7
IO_L34P_7
IO_L34N_7/VREF_7
IO_L33P_7
IO_L33N_7
Pin Number
N31
P31
T27
R28
M33
M34
M31
M32
R24
R25
M29
M30
L33
L34
P27
P28
L29
L30
K33
K34
P26
R26
K32
L32
K29
K30
P24
P25
J32
J33
J31
K31
N28
N29
H32
H33
H29
H30
No Connects
XC2VP40
XC2VP50
DS083 (v4.7) November 5, 2007
Product Specification
www.xilinx.com
Module 4 of 4
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