DS083 Datasheet, PDF (223/430 Pages) Xilinx, Inc – Summary of Features

R
Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Pinout Information
Table 9: FF896 — XC2VP7, XC2VP20, XC2VPX20, and XC2VP30
Pin Description
Bank
Virtex-II Pro devices
XC2VPX20
(if Different)
Pin
Number
N/A
GND
N17
N/A
GND
N16
N/A
GND
N15
N/A
GND
N14
N/A
GND
N13
N/A
GND
N12
N/A
GND
M19
N/A
GND
M18
N/A
GND
M17
N/A
GND
M16
N/A
GND
M15
N/A
GND
M14
N/A
GND
M13
N/A
GND
M12
N/A
GND
L28
N/A
GND
L25
N/A
GND
L20
N/A
GND
L11
N/A
GND
L6
N/A
GND
L3
N/A
GND
H30
N/A
GND
H1
N/A
GND
F25
N/A
GND
F18
N/A
GND
F13
N/A
GND
F6
N/A
GND
E26
N/A
GND
E5
N/A
GND
D27
N/A
GND
D22
N/A
GND
D19
N/A
GND
D12
N/A
GND
D9
N/A
GND
D4
N/A
GND
C28
N/A
GND
C17
XC2VP7
No Connects
XC2VP20,
XC2VPX20 XC2VP30
DS083 (v4.7) November 5, 2007
Product Specification
www.xilinx.com
Module 4 of 4
95