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DS083 Datasheet, PDF (411/430 Pages) Xilinx, Inc – Summary of Features
R
Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Pinout Information
Table 14: FF1696 — XC2VP100
Bank
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
Pin Description
IO_L26P_7
IO_L26N_7
IO_L25P_7
IO_L25N_7
IO_L24P_7
IO_L24N_7
IO_L23P_7
IO_L23N_7
IO_L22P_7
IO_L22N_7/VREF_7
IO_L21P_7
IO_L21N_7
IO_L20P_7
IO_L20N_7
IO_L19P_7
IO_L19N_7
IO_L18P_7
IO_L18N_7
IO_L17P_7
IO_L17N_7
IO_L16P_7
IO_L16N_7/VREF_7
IO_L15P_7
IO_L15N_7
IO_L14P_7
IO_L14N_7
IO_L13P_7
IO_L13N_7
IO_L12P_7
IO_L12N_7
IO_L11P_7
IO_L11N_7
IO_L10P_7
IO_L10N_7/VREF_7
IO_L09P_7
IO_L09N_7
IO_L08P_7
Pin Number
V31
U31
L41
L42
K40
L40
T34
T35
L38
L39
K36
L36
T32
T33
K41
K42
K37
K38
R34
R35
H42
J41
J39
J40
R32
R33
J36
J37
H40
H41
T31
R31
H38
H39
H36
H37
P34
No Connects
XC2VP100
DS083 (v4.7) November 5, 2007
Product Specification
www.xilinx.com
Module 4 of 4
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