DS083 Datasheet, PDF (395/430 Pages) Xilinx, Inc – Summary of Features

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Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Pinout Information
Table 14: FF1696 — XC2VP100
Bank
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
Pin Description
IO_L19N_3
IO_L19P_3
IO_L18N_3
IO_L18P_3
IO_L17N_3
IO_L17P_3
IO_L16N_3
IO_L16P_3
IO_L15N_3/VREF_3
IO_L15P_3
IO_L14N_3
IO_L14P_3
IO_L13N_3
IO_L13P_3
IO_L12N_3
IO_L12P_3
IO_L11N_3
IO_L11P_3
IO_L10N_3
IO_L10P_3
IO_L09N_3/VREF_3
IO_L09P_3
IO_L08N_3
IO_L08P_3
IO_L07N_3
IO_L07P_3
IO_L72N_3
IO_L72P_3
IO_L71N_3
IO_L71P_3
IO_L70N_3
IO_L70P_3
IO_L69N_3/VREF_3
IO_L69P_3
IO_L68N_3
IO_L68P_3
IO_L67N_3
Pin Number
AM3
AN3
AN1
AN2
AG12
AH12
AP6
AP7
AP3
AP4
AH10
AH11
AR6
AR7
AR4
AR5
AH8
AH9
AR2
AR3
AP2
AR1
AJ10
AJ11
AT7
AT8
AT3
AT4
AJ12
AK12
AT1
AT2
AT6
AU6
AK10
AK11
AT5
No Connects
XC2VP100
DS083 (v4.7) November 5, 2007
Product Specification
www.xilinx.com
Module 4 of 4
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