DS083 Datasheet, PDF (278/430 Pages) Xilinx, Inc – Summary of Features

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Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Pinout Information
Table 11: FF1148 — XC2VP40 and XC2VP50
Bank
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
Pin Description
IO_L32P_7
IO_L32N_7
IO_L31P_7
IO_L31N_7
IO_L30P_7
IO_L30N_7
IO_L29P_7
IO_L29N_7
IO_L28P_7
IO_L28N_7/VREF_7
IO_L27P_7
IO_L27N_7
IO_L26P_7
IO_L26N_7
IO_L25P_7
IO_L25N_7
IO_L24P_7
IO_L24N_7
IO_L23P_7
IO_L23N_7
IO_L22P_7
IO_L22N_7/VREF_7
IO_L21P_7
IO_L21N_7
IO_L20P_7
IO_L20N_7
IO_L19P_7
IO_L19N_7
IO_L18P_7
IO_L18N_7
IO_L17P_7
IO_L17N_7
IO_L16P_7
IO_L16N_7/VREF_7
IO_L15P_7
IO_L15N_7
IO_L14P_7
IO_L14N_7
Pin Number
N24
N25
G33
G34
H31
G32
N27
M28
G28
G29
F33
F34
M26
M27
F31
F32
F30
G30
L25
M25
F27
F28
E29
F29
L28
K28
D33
D34
D32
E32
K26
L26
D31
E31
D29
D30
J28
J29
No Connects
XC2VP40
XC2VP50
DS083 (v4.7) November 5, 2007
Product Specification
www.xilinx.com
Module 4 of 4
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