DS083 Datasheet, PDF (53/430 Pages) Xilinx, Inc – Summary of Features

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Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Functional Description
Sum of Products
Each Virtex-II Pro slice has a dedicated OR gate named
ORCY, ORing together outputs from the slices carryout and
the ORCY from an adjacent slice. The ORCY gate with the
dedicated Sum of Products (SOP) chain are designed for
implementing large, flexible SOP chains. One input of each
ORCY is connected through the fast SOP chain to the output
of the previous ORCY in the same slice row. The second input
is connected to the output of the top MUXCY in the same slice,
as shown in Figure 43.
ORCY
ORCY
4 _LUT
4 _LUT
MUXCY
4 _LUT
Slice 1
MUXCY
4 _LUT
MUXCY
Slice 3
MUXCY
4 _LUT
4 _LUT
ORCY
MUXCY
4 _LUT
Slice 1
MUXCY
4 _LUT
ORCY
SOP
MUXCY
Slice 3
MUXCY
4 _LUT
4 _LUT
4
MUXCY
Slice 0
4
MUXCY
V_CC
LUT
LUT
MUXCY
Slice 2
MUXCY
V_CC
CLB
4 _LUT
4 _LUT
MUXCY
4 _LUT
Slice 0
MUXCY
4 _LUT
V_CC
Figure 43: Horizontal Cascade Chain
MUXCY
Slice 2
MUXCY
V_CC
CLB
ds031_64_110300
LUTs and MUXCYs can implement large AND gates or LUT and MUXCY resources configured as a 16-input AND
other combinatorial logic functions. Figure 44 illustrates gate.
OUT
4
LUT
4
LUT
MUXCY
0
1
“0”
Slice
MUXCY
0
1
“0”
16
AND
OUT
4
LUT
MUXCY
0
1
“0”
Slice
4
LUT
MUXCY
0
1
V_CC
Figure 44: Wide-Input AND Gate (16 Inputs)
DS031_41_110600
DS083 (v4.7) November 5, 2007
Product Specification
www.xilinx.com
Module 2 of 4
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