DS083 Datasheet, PDF (219/430 Pages) Xilinx, Inc – Summary of Features

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Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Pinout Information
Table 9: FF896 — XC2VP7, XC2VP20, XC2VPX20, and XC2VP30
Pin Description
Bank
Virtex-II Pro devices
XC2VPX20
(if Different)
Pin
Number
N/A
TXPPAD19
AK19
N/A
TXNPAD19
AK20
N/A
VTTXPAD19
AJ20
N/A
AVCCAUXTX19
AJ19
N/A
AVCCAUXRX21
AJ24
N/A
VTRXPAD21
AJ25
N/A
RXNPAD21
AK24
N/A
RXPPAD21
AK25
N/A
GNDA21
AH25
N/A
TXPPAD21
AK26
N/A
TXNPAD21
AK27
N/A
VTTXPAD21
AJ27
N/A
AVCCAUXTX21
AJ26
XC2VP7
No Connects
XC2VP20,
XC2VPX20 XC2VP30
N/A
VCCAUX
N/A
VCCAUX
N/A
VCCAUX
N/A
VCCAUX
N/A
VCCAUX
N/A
VCCAUX
N/A
VCCAUX
N/A
VCCAUX
N/A
VCCAUX
N/A
VCCAUX
N/A
VCCAUX
N/A
VCCAUX
N/A
VCCAUX
N/A
VCCAUX
N/A
VCCAUX
N/A
VCCAUX
N/A
VCCINT
N/A
VCCINT
N/A
VCCINT
N/A
VCCINT
N/A
VCCINT
N/A
VCCINT
AK29
AK16
AK15
AK2
AJ30
AJ1
T30
T1
R30
R1
B30
B1
A29
A16
A15
A2
Y19
Y18
Y17
Y16
Y15
Y14
DS083 (v4.7) November 5, 2007
Product Specification
www.xilinx.com
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