DS083 Datasheet, PDF (381/430 Pages) Xilinx, Inc – Summary of Features

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Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Pinout Information
FF1696 Flip-Chip Fine-Pitch BGA Package
As shown in Table 14, XC2VP100 Virtex-II Pro devices are available in the FF1696 flip-chip fine-pitch BGA package.
Following this table are the FF1696 Flip-Chip Fine-Pitch BGA Package Specifications (1.00mm pitch).
Table 14: FF1696 — XC2VP100
Bank
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Pin Description
IO_L01N_0/VRP_0
IO_L01P_0/VRN_0
IO_L02N_0
IO_L02P_0
IO_L03N_0
IO_L03P_0/VREF_0
IO_L05_0/No_Pair
IO_L06N_0
IO_L06P_0
IO_L07N_0
IO_L07P_0
IO_L08N_0
IO_L08P_0
IO_L09N_0
IO_L09P_0/VREF_0
IO_L19N_0
IO_L19P_0
IO_L20N_0
IO_L20P_0
IO_L21N_0
IO_L21P_0
IO_L25N_0
IO_L25P_0
IO_L26N_0
IO_L26P_0
IO_L27N_0
IO_L27P_0/VREF_0
IO_L28N_0
IO_L28P_0
IO_L29N_0
IO_L29P_0
IO_L30N_0
IO_L30P_0
IO_L34N_0
Pin Number
E33
F33
K32
L32
C32
C33
G33
A33
B33
F32
G32
H32
J32
D32
E32
A32
B32
K31
L31
H30
G31
E31
F31
H31
J31
D30
D31
B31
C31
K30
L30
F30
G30
B30
No Connects
XC2VP100
DS083 (v4.7) November 5, 2007
Product Specification
www.xilinx.com
Module 4 of 4
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