English
Language : 

DS083 Datasheet, PDF (242/430 Pages) Xilinx, Inc – Summary of Features
R
Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Pinout Information
Table 10: FF1152 — XC2VP20, XC2VP30, XC2VP40, and XC2VP50
Bank
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
Pin Description
IO_L86N_7
IO_L85P_7
IO_L85N_7
IO_L60P_7
IO_L60N_7
IO_L59P_7
IO_L59N_7
IO_L58P_7
IO_L58N_7/VREF_7
IO_L57P_7
IO_L57N_7
IO_L56P_7
IO_L56N_7
IO_L55P_7
IO_L55N_7
IO_L54P_7
IO_L54N_7
IO_L53P_7
IO_L53N_7
IO_L52P_7
IO_L52N_7/VREF_7
IO_L51P_7
IO_L51N_7
IO_L50P_7
IO_L50N_7
IO_L49P_7
IO_L49N_7
IO_L48P_7
IO_L48N_7
IO_L47P_7
IO_L47N_7
IO_L46P_7
IO_L46N_7/VREF_7
IO_L45P_7
IO_L45N_7
IO_L44P_7
IO_L44N_7
IO_L43P_7
Pin
Number
U25
T32
T31
T30
T29
T28
T27
T33
R33
R32
R31
T26
T25
R34
P34
R29
R28
U24
T24
P32
P31
P30
P29
R26
R25
P33
N33
N32
N31
P28
P27
N34
M34
N30
N29
P26
P25
M32
XC2VP20
No Connects
XC2VP30 XC2VP40
XC2VP50
DS083 (v4.7) November 5, 2007
Product Specification
www.xilinx.com
Module 4 of 4
114