DS083 Datasheet, PDF (222/430 Pages) Xilinx, Inc – Summary of Features

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Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Pinout Information
Table 9: FF896 — XC2VP7, XC2VP20, XC2VPX20, and XC2VP30
Pin Description
Bank
Virtex-II Pro devices
XC2VPX20
(if Different)
Pin
Number
N/A
GND
U18
N/A
GND
U17
N/A
GND
U16
N/A
GND
U15
N/A
GND
U14
N/A
GND
U13
N/A
GND
U12
N/A
GND
U6
N/A
GND
T19
N/A
GND
T18
N/A
GND
T17
N/A
GND
T16
N/A
GND
T15
N/A
GND
T14
N/A
GND
T13
N/A
GND
T12
N/A
GND
R19
N/A
GND
R18
N/A
GND
R17
N/A
GND
R16
N/A
GND
R15
N/A
GND
R14
N/A
GND
R13
N/A
GND
R12
N/A
GND
P25
N/A
GND
P19
N/A
GND
P18
N/A
GND
P17
N/A
GND
P16
N/A
GND
P15
N/A
GND
P14
N/A
GND
P13
N/A
GND
P12
N/A
GND
P6
N/A
GND
N19
N/A
GND
N18
XC2VP7
No Connects
XC2VP20,
XC2VPX20 XC2VP30
DS083 (v4.7) November 5, 2007
Product Specification
www.xilinx.com
Module 4 of 4
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