DS083 Datasheet, PDF (345/430 Pages) Xilinx, Inc – Summary of Features

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Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Pinout Information
Table 13: FF1704 — XC2VP70, XC2VPX70, and XC2VP100
Pin Description
Bank
Virtex-II Pro Devices
XC2VPX70
(if Different)
3
IO_L17N_3
3
IO_L17P_3
3
IO_L16N_3
3
IO_L16P_3
3
IO_L15N_3/VREF_3
3
IO_L15P_3
3
IO_L14N_3
3
IO_L14P_3
3
IO_L13N_3
3
IO_L13P_3
3
IO_L12N_3
3
IO_L12P_3
3
IO_L11N_3
3
IO_L11P_3
3
IO_L10N_3
3
IO_L10P_3
3
IO_L09N_3/VREF_3
3
IO_L09P_3
3
IO_L08N_3
3
IO_L08P_3
3
IO_L07N_3
3
IO_L07P_3
3
IO_L84N_3
3
IO_L84P_3
3
IO_L83N_3
3
IO_L83P_3
3
IO_L82N_3
3
IO_L82P_3
3
IO_L81N_3/VREF_3
3
IO_L81P_3
3
IO_L80N_3
3
IO_L80P_3
3
IO_L79N_3
3
IO_L79P_3
3
IO_L78N_3
3
IO_L78P_3
Pin Number
AL9
AL10
AM1
AM2
AM3
AN3
AM8
AM9
AM4
AM5
AM6
AM7
AN9
AM10
AN1
AN2
AN5
AN6
AN7
AN8
AP1
AP2
AP4
AP5
AR7
AP8
AP6
AP7
AR2
AR3
AT5
AR6
AR4
AR5
AT1
AT2
No Connects
XC2VP70,
XC2VPX70
XC2VP100
DS083 (v4.7) November 5, 2007
Product Specification
www.xilinx.com
Module 4 of 4
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