DS083 Datasheet, PDF (126/430 Pages) Xilinx, Inc – Summary of Features

R
Virtex-II Pro and Virtex-II Pro X Platform FPGAs: DC and Switching Characteristics
Date
12/05/03
(cont’d)
02/19/04
03/09/04
04/22/04
06/30/04
Version
3.0
(cont’d)
3.1
3.1.1
3.2
4.0
Revision
• Non-speedsfile parameter values added or updated:
• Table 3: I_BATT.
• Table 4: For XC2VP100, I_CCINTQ, I_CCOQ, and I_CCAUXQ .
• Table 5: For XC2VP100, I_CCINTMIN .
• Table 17: T_CPWL and T_CPWH .
• Table 25: Added explanatory footnote to T_RXLAT (MGT receiver latency) max value.
• Table 54: Added Footnote (3) regarding use of CLKIN_DIVIDE_BY_2 attribute.
• Updated time and frequency parameters as per speedsfile v1.85.
• Table 2, Recommended Operating Conditions: Revised Footnotes (4) and (6).
• Table 4, Quiescent Supply Current: Added Footnote (1) and updated Typical
parameters.
• Table 10, LVPECL DC Specifications: Added parameter values for Maximum
Differential Input Voltage (LVPECL).
• Table 14, Register-to-Register Performance: Removed reference to a number of
designs for which test data is no longer provided.
• Table 16, Processor Clocks Absolute AC Characteristics: Added Footnote (1) referring
to XAPP755.
• Added Table 38, Clock Distribution Switching Characteristics.
• Revised section Configuration Timing, page 37 through page 39, and JTAG Test
Access Port Switching Characteristics, page 40, with improved timing diagrams,
parameter tables, and organization.
• Table 47, Master/Slave Serial Mode Timing Characteristics, and Table 48, SelectMAP
Mode Write Timing Characteristics: Added parameter F_{CC_STARTUP}.
• Table 48, SelectMAP Mode Write Timing Characteristics: Broke out T_SMDCC/T_SMCCD ,
DATA[0:7] setup/hold time, by device, and added new parameter specifications for
XC2VP70 and XC2VP100 devices.
• Table 54, Operating Frequency Ranges: Added callouts for existing Footnote (3) to the
four CLKIN parameters. Added new Footnote (4) to the four CLKIN parameters. Added
new Footnote (5) to CLK2X, CLK2X180. Added new Footnote (6) to CLK2X,
CLK2X180; CLK0, CLK180; and CLKIN (using DLL outputs).
• Recompiled for backward compatibility with Acrobat 4 and above. No content
changes.
• Table 2, Recommended Operating Conditions: Corrected VTTX/VTRX lower voltage
limit from 1.8V to 1.6V.
• Table 5, Power-On Current for Virtex-II Pro Devices: Added Footnote (2) stating that
listed I_CCOMIN values apply to the entire device (all banks).
• Table 37, Output Delay Measurement Methodology: Corrected V_MEAS for LVTTL from
1.4V to 1.65V.
• Table 54, Operating Frequency Ranges: Corrected CLKOUT_FREQ_1X_LF_MAX and
CLKIN_FREQ_DLL_LF_MAX for -7 devices from 210 MHz to 270 MHz.
• Table 62, Package Skew: Removed XC2VP40FF1517.
Merged in DS110-3 (Module 3 of Virtex-II Pro X data sheet). This merge added numerous
previously unpublished RocketIO X MGT parameters. Specifications in this revision are
from speedsfile v1.86.
DS083 (v4.7) November 5, 2007
Product Specification
www.xilinx.com
Module 3 of 4
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