DS083 Datasheet, PDF (88/430 Pages) Xilinx, Inc – Summary of Features

R
Virtex-II Pro and Virtex-II Pro X Platform FPGAs: DC and Switching Characteristics
Table 26: RocketIO X Transmitter Switching Characteristics⁽¹⁾
Description
BREFCLK
Symbol Conditions Frequency Min
Typ
Max Units
Serial data rate
F_GTX
2.488 Gb/s
2.488
0.15
6.25
0.20
Gb/s
UI ⁽²⁾
Serial data output total jitter (p-p)⁽³⁾
3.125 Gb/s
T_TJ
4.25 Gb/s
0.14
0.19
UI
0.39
0.48
UI
6.25 Gb/s
0.42
0.54
UI
2.488 Gb/s 155.52 MHz
0.03
0.17
UI
Serial data output deterministic jitter (p-p)⁽³⁾
3.125 Gb/s 156.25 MHz
T_DJ
4.25 Gb/s
212.5 MHz
0.03
0.17
UI
0.14
0.26
UI
6.25 Gb/s
312.5 MHz
0.17
0.35
UI
2.488 Gb/s 155.52 MHz
0.12
0.18
UI
Serial data output random jitter (p-p)^(3,4)
3.125 Gb/s 156.25 MHz
T_RJ
4.25 Gb/s
212.5 MHz
0.12
0.20
UI
0.25
0.39
UI
6.25 Gb/s
312.5 MHz
0.25
0.39
UI
TX rise time
TX fall time
Transmit latency⁽⁵⁾
T_RTX
T_FTX
20% – 80%
@ 2.500 Gb/s
T_TXLAT
60
ps
60
ps
TXUSR
14
19
CLK
cycles
TXUSRCLK duty cycle
T_TXDC
45
50
55
%
TXUSRCLK2 duty cycle
T_TX2DC
45
50
55
%
Notes:
1. The XC2VPX70 operates at a fixed 4.25 Gb/s baud rate.
2. UI = Unit Interval
3. Total Jitter T_TJ = T_DJ + T_RJ
4. T_RJ specifications are wideband and include low-frequency jitter components (also referred to as wander).T_RJ specified is peak-to-peak, estimated at
BER=10^–12 using the Bathtub Method.
5. Transmit latency delay TXDATA to TXP/TXN. Refer to RocketIO X Transceiver User Guide for more information on calculating latency.
DS083 (v4.7) November 5, 2007
Product Specification
www.xilinx.com
Module 3 of 4
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