DS083 Datasheet, PDF (43/430 Pages) Xilinx, Inc – Summary of Features

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Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Functional Description
Table 15: SelectIO-Ultra Differential Buffers With On-Chip Termination
IOSTANDARD Attribute
I/O Standard Description
External Termination
On-Chip Termination
LVDS 2.5V
LVDS_25
LVDS_25_DCI
LVDS Extended 2.5V
LVDSEXT_25
LVDSEXT_25_DCI
Figure 28 provides examples illustrating the use of the HSTL_I_DCI, HSTL_II_DCI, HSTL_III_DCI, and HSTL_IV_DCI I/O
standards. For a complete list, see the Virtex-II Pro Platform FPGA User Guide.
HSTL_I
HSTL_II
HSTL_III
HSTL_IV
Conventional
V_CCO/2
R
Z0
V_CCO/2
V_CCO/2
R
R
Z0
V_CCO
R
Z0
V_CCO
V_CCO
R
R
Z0
DCI Transmit
Conventional
Receive
Virtex-II Pro
DCI
V_CCO/2
R
Z0
V_CCO
2R
2R
Virtex-II Pro
DCI
V_CCO/2
R
Z0
Virtex-II Pro
DCI
V_CCO
R
Z0
V_CCO
R
Virtex-II Pro
DCI
V_CCO
R
Z0
Conventional
Transmit
DCI Receive
V_CCO
2R
Z0
2R
Virtex-II Pro
DCI
V_CCO/2
R
Z0
V_CCO
2R
2R
Virtex-II Pro
DCI
V_CCO
R
Z0
Virtex-II Pro
DCI
V_CCO
R
Z0
V_CCO
R
Virtex-II Pro
DCI
DCI Transmit
DCI Receive
V_CCO
2R
V_CCO
2R
V_CCO
2R
Z0
2R
Z0
2R
2R
Virtex-II Pro Virtex-II Pro
DCI
DCI
Virtex-II Pro
DCI
V_CCO
R
Z0
V_CCO
R
V_CCO
R
Z0
Virtex-II Pro Virtex-II Pro
DCI
DCI
Virtex-II Pro
DCI
Bidirectional
N/A
Reference
Resistor
VRN = VRP = R = Z0
Recommended
Z0
50Ω
V_CCO
V_CCO
2R
2R
Z0
2R
2R
Virtex-II Pro
DCI
Virtex-II Pro
DCI
VRN = VRP = R = Z0
50Ω
N/A
VRN = VRP = R = Z0
50Ω
Figure 28: HSTL DCI Usage Examples
V_CCO
R
V_CCO
R
Z0
Virtex-II Pro
DCI
Virtex-II Pro
DCI
VRN = VRP = R = Z0
50Ω
DS083-2_65a_082102
DS083 (v4.7) November 5, 2007
Product Specification
www.xilinx.com
Module 2 of 4
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