DS083 Datasheet, PDF (251/430 Pages) Xilinx, Inc – Summary of Features

R
Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Pinout Information
Table 10: FF1152 — XC2VP20, XC2VP30, XC2VP40, and XC2VP50
Bank
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Pin Description
VTTXPAD21
AVCCAUXTX21
AVCCAUXRX23
VTRXPAD23
RXNPAD23
RXPPAD23
GNDA23
TXPPAD23
TXNPAD23
VTTXPAD23
AVCCAUXTX23
Pin
Number
AN29
AN28
AN30
AN31
AP30
AP31
AM30
AP32
AP33
AN33
AN32
XC2VP20
NC
NC
NC
NC
NC
NC
NC
NC
NC
No Connects
XC2VP30 XC2VP40
NC
NC
NC
NC
NC
NC
NC
NC
NC
XC2VP50
N/A
VCCINT
N/A
VCCINT
N/A
VCCINT
N/A
VCCINT
N/A
VCCINT
N/A
VCCINT
N/A
VCCINT
N/A
VCCINT
N/A
VCCINT
N/A
VCCINT
N/A
VCCINT
N/A
VCCINT
N/A
VCCINT
N/A
VCCINT
N/A
VCCINT
N/A
VCCINT
N/A
VCCINT
N/A
VCCINT
N/A
VCCINT
N/A
VCCINT
N/A
VCCINT
N/A
VCCINT
N/A
VCCINT
N/A
VCCINT
N/A
VCCINT
N/A
VCCINT
L11
L24
M12
M23
N13
N14
N15
N16
N17
N18
N19
N20
N21
N22
P13
P22
R13
R22
T13
T22
U13
U22
V13
V22
W13
W22
DS083 (v4.7) November 5, 2007
Product Specification
www.xilinx.com
Module 4 of 4
123