HD64F3048F16 Datasheet, PDF (839/903 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

SCR—Serial Control Register
Appendix B Internal I/O Register
H'B2
SCI0
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
TIE
RIE
TE
RE MPIE TEIE CKE1 CKE0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Clock enable 1 and 0
Bit 1 Bit 0
CKE1 CKE0 Clock Selection and Output
0 0 Asynchronous mode Internal clock, SCK pin available for generic I/O
Synchronous mode Internal clock, SCK pin used for serial clock output
1 Asynchronous mode Internal clock, SCK pin used for clock output
Synchronous mode Internal clock, SCK pin used for serial clock output
1 0 Asynchronous mode External clock, SCK pin used for clock input
Synchronous mode External clock, SCK pin used for serial clock input
1 Asynchronous mode External clock, SCK pin used for clock input
Synchronous mode External clock, SCK pin used for serial clock input
Transmit-end interrupt enable
0 Transmit-end interrupt requests (TEI) are disabled
1 Transmit-end interrupt requests (TEI) are enabled
Multiprocessor interrupt enable
0 Multiprocessor interrupts are disabled (normal receive operation)
1 Multiprocessor interrupts are enabled
Transmit enable
0 Transmitting is disabled
1 Transmitting is enabled
Receive enable
0 Receiving is disabled
1 Receiving is enabled
Receive interrupt enable
0 Receive-data-full (RXI) and receive-error (ERI) interrupt requests are disabled
1 Receive-data-full (RXI) and receive-error (ERI) interrupt requests are enabled
Transmit interrupt enable
0 Transmit-data-empty interrupt request (TXI) is disabled
1 Transmit-data-empty interrupt request (TXI) is enabled
Rev. 3.00 Sep 27, 2006 page 811 of 872
REJ09B0325-0300