HD64F3048F16 Datasheet, PDF (72/903 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 2 CPU
Table 2.4 Arithmetic Operation Instructions
Instruction
ADD, SUB
Size^*
B/W/L
ADDX, SUBX B
INC, DEC
B/W/L
ADDS, SUBS L
DAA, DAS
B
MULXU
B/W
MULXS
B/W
DIVXU
B/W
DIVXS
B/W
Function
Rd ± Rs → Rd, Rd ± #IMM → Rd
Performs addition or subtraction on data in two general registers, or
on immediate data and data in a general register. (Immediate byte
data cannot be subtracted from data in a general register. Use the
SUBX or ADD instruction.)
Rd ± Rs ± C → Rd, Rd ± #IMM ± C → Rd
Performs addition or subtraction with carry or borrow on data in two
general registers, or on immediate data and data in a general
register.
Rd ± 1 → Rd, Rd ± 2 → Rd
Increments or decrements a general register by 1 or 2. (Byte
operands can be incremented or decremented by 1 only.)
Rd ± 1 → Rd, Rd ± 2 → Rd, Rd ± 4 → Rd
Adds or subtracts the value 1, 2, or 4 to or from data in a 32-bit
register.
Rd decimal adjust → Rd
Decimal-adjusts an addition or subtraction result in a general register
by referring to CCR to produce 4-bit BCD data.
Rd × Rs → Rd
Performs unsigned multiplication on data in two general registers:
either 8 bits × 8 bits → 16 bits or 16 bits × 16 bits → 32 bits.
Rd × Rs → Rd
Performs signed multiplication on data in two general registers:
either 8 bits × 8 bits → 16 bits or 16 bits × 16 bits → 32 bits.
Rd ÷ Rs → Rd
Performs unsigned division on data in two general registers: either
16 bits ÷ 8 bits → 8-bit quotient and 8-bit remainder or 32 bits ÷ 16
bits → 16-bit quotient and 16-bit remainder.
Rd ÷ Rs → Rd
Performs signed division on data in two general registers: either 16
bits ÷ 8 bits → 8-bit quotient and 8-bit remainder, or 32 bits ÷ 16 bits
→ 16-bit quotient and 16-bit remainder.
Rev. 3.00 Sep 27, 2006 page 44 of 872
REJ09B0325-0300