HD64F3048F16 Datasheet, PDF (652/903 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 18 ROM (H8/3048F-ONE: Single Power Supply, H8/3048B Mask ROM Version)
φ
V_CC
t_OSC1
Min 0 µs
FWE
t_MDS
t_MD^*_S2
MD₂ to MD₀,
RXD1^*4
t_MDS
t_RESW
RES
SWE bit
SWE set
SWE clear
Mode switching^*1 Boot mode Mode
User
switching^*1 mode
User program mode
Flash memory access disabled time
(x: Wait time after SWE setting, y: wait time after SWE clearing)^*3
Flash memory reprogammable period
(Flash memory program execution and data read, other than verify, are disabled.)
User
mode
User
program
mode
Notes: 1. In transition to the boot mode and transition from the boot mode to another mode, mode switching via RES
input is necessary.
During this switching period (period during which a low level is input to the RES pin),the state of the address
dual port and bus control output signals (CSn, AS, RD, WR) changes.
Therefore, do not use these pins as output signals during this switching period.
2. When making a transition from the boot mode to another mode, the mode programming setup time t_MDS relative
to the RES clear timing is necessary.
3. See section 21.1.6, Flash Memory Characteristics.
4. For pin RXD1, use on-board pull-up.
Figure 18.20 Mode Transition Timing
(Example: Boot mode → User mode ↔ User program mode)
Rev. 3.00 Sep 27, 2006 page 624 of 872
REJ09B0325-0300