HD64F3048F16 Datasheet, PDF (408/903 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 10 16-Bit Integrated Timer Unit (ITU)
Figure 10.36 shows examples of waveforms with 0% and 100% duty cycles (in one phase) in
complementary PWM mode. In this example the outputs change at compare match with GRB3, so
waveforms with duty cycles of 0% or 100% can be output by setting GRB3 to a value larger than
GRA3. The duty cycle can be changed easily during operation by use of the buffer registers. For
further information see section 10.4.8, Buffering.
TCNT3 and
TCNT4 values
GRA3
GRB3
H'0000
TIOCA₃
TIOCB₃
TCNT3 and
TCNT4 values
GRA3
0% duty cycle
a. 0% duty cycle
Time
GRB3
H'0000
Time
TIOCA₃
TIOCB₃
100% duty cycle
b. 100% duty cycle
Figure 10.36 Operation in Complementary PWM Mode (Example 2, OLS3 = OLS4 = 1)
Rev. 3.00 Sep 27, 2006 page 380 of 872
REJ09B0325-0300