HD64F3048F16 Datasheet, PDF (310/903 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 9 I/O Ports
Port 6 Data Register (P6DR)
P6DR is an 8-bit readable/writable register that stores output data for pins P6₆ to P6₀. When this
register is read, bits 6 to 0 each returns the logic level of the pin, when the corresponding bit of
P6DDR is 0. When the corresponding bit of P6DDR is 1, bits 6 to 0 return the P6DR value.
Bit
7
6
5
4
3
2
1
0

P6 ₆
P6 ₅
P6 ₄
P6 ₃
P6 ₂
P6 ₁
P6 ₀
Initial value
1
0
0
0
0
0
0
0
Read/Write

R/W R/W
R/W
R/W
R/W
R/W
R/W
Reserved bit
Port 6 data 6 to 0
These bits store data for port 6 pins
Bit 7 is reserved, cannot be modified, and always read as 1.
P6DR is initialized to H'80 by a reset and in hardware standby mode. In software standby mode it
retains its previous setting.
Table 9.11 Port 6 Pin Functions in Modes 1 to 6
Pin
P6 /LWR
6
Pin Functions and Selection Method
Functions as follows regardless of P6 DDR
6
P6₆DDR
0
1
Pin function
LWR output
P6₅/HWR
Functions as follows regardless of P6₅DDR
P6₅DDR
0
1
Pin function
HWR output
P6₄/RD
Functions as follows regardless of P6₄DDR
P6 DDR
0
1
4
Pin function
RD output
Rev. 3.00 Sep 27, 2006 page 282 of 872
REJ09B0325-0300