HD64F3048F16 Datasheet, PDF (121/903 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 5 Interrupt Controller
5.1.3 Pin Configuration
Table 5.1 lists the interrupt pins.
Table 5.1 Interrupt Pins
Name
Abbreviation I/O
Function
Nonmaskable interrupt
NMI
Input
Nonmaskable interrupt^*, rising edge
or falling edge selectable
External interrupt request
5 to 0
IRQ₅ to IRQ₀
Input
Maskable interrupts, falling edge or
level sensing selectable
Note: * For the H8/3048F-ONE (single power supply with flash memory), the NMI input may be
prohibited. For details, refer to section 18.8.4, NMI Input Disable Conditions.
5.1.4 Register Configuration
Table 5.2 lists the registers of the interrupt controller.
Table 5.2 Interrupt Controller Registers
Address^*1 Name
H'FFF2
System control register
H'FFF4
IRQ sense control register
H'FFF5
IRQ enable register
H'FFF6
IRQ status register
H'FFF8
Interrupt priority register A
H'FFF9
Interrupt priority register B
Notes: 1. Lower 16 bits of the address.
2. Only 0 can be written, to clear flags.
Abbreviation
SYSCR
ISCR
IER
ISR
IPRA
IPRB
R/W
R/W
R/W
R/W
R/(W)^*2
R/W
R/W
Initial Value
H'0B
H'00
H'00
H'00
H'00
H'00
Rev. 3.00 Sep 27, 2006 page 93 of 872
REJ09B0325-0300