 English |
|
|
|
|
|
|
|
| HD64F3048F16 Datasheet, PDF (212/903 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents | |||
| |||
| ◁ |
Section 7 Refresh Controller
H8/3048B Group
A 19
A 9 to A 1
2CAS 4-Mbit DRAM with 9-bit
row address, 9-bit column
address, and à 16-bit organization
A8 to A 0
RAS
UCAS
LCAS
WE
OE
I/O15 to I/O0
No. 1
CS 3
HWR
LWR
RD
A8 to A 0
RAS
UCAS
LCAS
WE
No. 2
RFSH
D15 to D 0
OE
I/O15 to I/O0
a. Interconnections (example)
H'600000
H'67FFFF
H'680000
H'6FFFFF
H'700000
No. 1
DRAM area
No. 2
DRAM area
Area 3 (16-Mbyte mode)
Not used
H'7FFFFF
b. Address map
Figure 7.13 Interconnections and Address Map for Multiple 2CAS 4-Mbit DRAM Chips
(Example)
Rev. 3.00 Sep 27, 2006 page 184 of 872
REJ09B0325-0300
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese