HD64F3048F16 Datasheet, PDF (263/903 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 8 DMA Controller
If M (1 to 255) is the size of the block transferred at each request and N (1 to 65,536) is the
number of blocks to be transferred, then ETCRAH and ETCRAL should initially be set to M and
ETCRB should initially be set to N.
Figure 8.10 illustrates how block transfer mode operates. In this figure, bit TMS is cleared to 0,
meaning the block area is the destination.
T_A
Block 1
B_A
Transfer
Block area
Address T _B
Address B _B
Block 2
M bytes or words are
transferred per request
Block N
Legend:
L _A = initial setting of MARA
L _B = initial setting of MARB
M = initial setting of ETCRAH and ETCRAL
N = initial setting of ETCRB
T_A = L_A
B _A = L _A + SAIDE • (−1)^SAID • (2^DTSZ • M − 1)
T_B = L_B
B _B = L _B + DAIDE • (−1)^DAID • (2^DTSZ • M − 1)
Figure 8.10 Operation in Block Transfer Mode
Rev. 3.00 Sep 27, 2006 page 235 of 872
REJ09B0325-0300