HD64F3048F16 Datasheet, PDF (44/903 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 1 Overview
Type
Symbol Pin No.
Operating mode MD₂ to MD₀ 75 to 73
control
I/O
Input
Name and Function
Mode 2 to mode 0: For setting the
operating mode, as follows. Inputs at these
pins must not be changed during operation.
MD₂ MD₁ MD₀ Operating Mode
0
0
0
—
0
0
1
Mode 1
0
1
0
Mode 2
0
1
1
Mode 3
1
0
0
Mode 4
1
0
1
Mode 5
1
1
0
Mode 6
1
1
1
Mode 7
System control RES
63
RESO
10
(RESO/V_PP)
FWE^*3
10
STBY
62
BREQ
59
BACK
60
Interrupts
NMI
Address bus
IRQ₅ to
IRQ₀
A₂₃ to A₀
Data bus
D₁₅ to D₀
64
17, 16,
90 to 87
97 to 100,
56 to 45,
43 to 36
34 to 23,
21 to 18
Input
Output
Input
Input
Input
Output
Input
Input
Output
Reset input: When driven low, this pin
resets the chip
Reset output: For the mask ROM version,
outputs a reset signal to external devices
Also used as a power supply for on-board
programming of the flash memory version
with dual power supply.
Write enable signal: Write-control signal
for writing to flash memory for the flash
memory version with single power supply
Standby: When driven low, this pin forces a
transition to hardware standby mode
Bus request: Used by an external bus
master to request the bus right
Bus request acknowledge: Indicates that
the bus has been granted to an external bus
master
Nonmaskable interrupt: Requests a
nonmaskable interrupt
Interrupt request 5 to 0: Maskable
interrupt request pins
Address bus: Outputs address signals
Input/ Data bus: Bidirectional data bus
output
Rev. 3.00 Sep 27, 2006 page 16 of 872
REJ09B0325-0300