HD64F3048F16 Datasheet, PDF (429/903 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 10 16-Bit Integrated Timer Unit (ITU)
Contention between TCNT Word Write and Increment
If an increment pulse occurs in the T₃ state of a TCNT word write cycle, writing takes priority and
TCNT is not incremented. See figure 10.62.
TCNT word write cycle
T₁
T₂
T₃
φ
Address bus
TCNT address
Internal write signal
TCNT input clock
TCNT
N
M
TCNT write data
Figure 10.62 Contention between TCNT Word Write and Increment
Rev. 3.00 Sep 27, 2006 page 401 of 872
REJ09B0325-0300